Planarization Pads

About

Abstract: The growing complexity of integrated circuit (IC) designs is increasing the need for multiple planarization steps in the IC manufacturing process. The primary method of achieving these planar surfaces is called Chemical Mechanical Planarization (CMP), and the pads that are used in conventional CMP are prone to inconsistent polishing leading to non-uniformity and imprecision in the IC wafers. These conventional CMP pads also require conditioning which can lead to pad contamination resulting in scratches and other defects on wafer surfaces. Preventing defects on wafers is critical as a single defect can ruin a $1 million wafer. Moreover, improving the CMP polishing rate can decrease the time and cost of this manufacturing process.  To address these issues, researchers at UC Berkeley have developed a new CMP pad design that provides the maximum amount of polishing while minimizing pad degradation and in turn ensures efficient and consistent polishing performance. The Berkeley CMP pads enable efficient slurry delivery leading to faster rates of material removal. This pad design also doesn't require conditioning and thereby reduces the manufacturing complexity and the cost of manufacturing consumables.  Additionally, the Berkeley pads can readily support MEMS sensors that can be used for end-point detection of the CMP process; and they are an enabling technology in the commercialization of NEMS because the Berkeley pads don't have the 10 nm minimum feature size limitation of conventional pads. Applications: Chemical Mechanical Planarization of wafers used in ICs, MEMS and NEMS. Advantages: Superior polishing performance with greater uniformity and fewer defects Faster (3x) material removal rate and less expensive manufacturing process leading to lower costs